
Application Note (AN241)
PCI-FRM01 Register Level Application Guide
2005 DAQ system, all rights reserved. http://www.daqsystem.com
7. LVDS(Camera Link) Interface Usage
LVDS(Low Voltage Differential Signal) Interface control
LVDS
LVDS Data registerC0h
Description
I/O Address
Offset
Function
C4h
C8h
CCh
LVDS Command register
LVDS Internal counter register
LVDS Status register
LVDS_DATA
Register
LVDS_CMD
LVDS_CNT
LVDS_STA
01234567891011121314
Data
LVDS Data Register Bit Position & meaning
D31
1516171819202122232425262728293031
D0
0123431
Reserved
LVDS Command Register Bit Position & meaning
5
DI ERS
15 01234567891011121314
Line Counter
LVDS Internal counter Register Bit Position & meaning
L15
16171819202122232425262728293031
Pixel Counter P0P15 L0
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