
Chapter 3 LPM Devices
DAQ Hardware Overview Guide 3-4 www.ni.com
LPM Device Counter/Timers
The LPM devices contain an onboard MSM82C53 Programmable Interval
Timer chip that has three independent 16-bit counter/timers. NI-DAQ uses
the three counter/timers from the 82C53 as follows:
• Counter 0 is used for data acquisition operations.
• Counter 1 is available for counting/timing operations.
Figure 3-1 shows the connections of the MSM82C53 Counter/Timer
signals to the device I/O connector.
Figure 3-1.
LPM Device Counter/Timer Signal Connections
The counter has a clock input, a gate input, and an output labeled CLK,
GAT, and OUT, respectively. The clock pin for counters 1 and 2 and the gate
and output pins for counters 1, 2, and 3 are available on the device
I/O connector. The inverted OUT1 signal is also available on the
I/O connector.
I/O Connector
2 MHz
Source
GATB2
CLKB2
OUTB2
OUTB0
GATB0
CLKB0
GATB1
CLKB1
OUTB1
8253 Counter/Timer
Group B
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